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Pedro Rivera

Pedro Rivera

pedrorivera

Pedro Rivera projects

SiaFpgaMiner

VHDL FPGA design of an optimized Blake2b pipeline to mine Siacoin

starsStars 44
forksForks 26
watchersWatchers 44
current-versionCurrent version
total-releasesTotal releases 0
open_issues_countOpen issues 1
dateCreated at 2018-02-05
updateUpdated at 2020-03-04